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the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. ? 2000 mos integrated circuit pd16721 384-output tft-lcd source driver (compatible with 256-gray scales) data sheet document no. s14791ej1v0ds00 (1st edition) date published february 2002 ns cp (k) printed in japan the mark ! ! ! ! shows major revised points. description the pd16721 is a source driver for tft-lcds capable of dealing with displays with 256-gray scales. data input is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216 colors by output of 256 values -corrected by an internal d/a converter and 8-by-2 external power modules. because the output dynamic range is as large as v ss2 + 0.2 v to v dd2 ? 0.2 v, level inversion operation of the lcd?s common electrode is rendered unnecessary. also, to be able to deal with dot-line inversion, n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-in 8-bit d/a converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. the maximum clock frequency is 70 mhz when driving at 3.0 v. features ? cmos level input ? 384 outputs ? input of 8 bits (gray scale data) by 6 dots ? capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a d/a converter ? logic power supply voltage (v dd1 ): 2.5 to 3.4 v ? driver power supply voltage (v dd2 ): 13.0 0.5 v or 15.0 0.5 v (switchable, v sel ) ? high-speed data transfer: f clk. = 70 mhz max. (internal data transfer speed when operating at v dd1 = 3.0 v) = 55 mhz max. (internal data transfer speed when operating at v dd1 = 2.5 v) ? output dynamic range: v ss2 + 0.2 v to v dd2 ? 0.2 v ? apply for dot-line inversion, n-line inversion and column line inversion ? output voltage polarity inversion function (pol) ? output inversion function (pol21/22) ? output reset control is possible (mode) ? slew-rate control is possible (src) ? output resistance control is possible (orc) ? single bank arrangement is possible (loaded with slim tcp) ordering information part number package pd16721n-xxx tcp (tab package) remark the tcp?s external shape is customized. to order the required shape, so please contact one of our sales representatives.
datasheet s14791ej1v0ds 2 pd16721 1. block diagram 64-bit bidirectional shift register c 1 c 2 c 63 c 64 data register latch d/a converter voltage follower output s 1 s 2 s 3 s 384 v 0 to v 15 pol d 00 to d 07 d 10 to d 17 d 20 to d 27 sthr r,/l clk stb mode sthl v dd1 v ss1 d 30 to d 37 d 40 to d 47 d 50 to d 57 pol21 pol22 level shifter v ss2 v dd2 src orc test input v sel remark /xxx indicates active low si gnal. 2. relationship between output circuit and d/a converter v 0 v 7 v 8 v 15 8 8 s 1 s 2 s 383 s 384 8-bit d/a converter multi- plexer pol
datasheet s14791ej1v0ds 3 pd16721 3. pin configuration ( pd16721n-xxx) (copper foil surface, face-up) s 384 s 383 sthl s 382 d 57 d 56 : d 51 d 50 d 47 d 46 : d 41 d 40 d 37 d 36 : d 31 d 30 src orc v sel v dd1 r , /l v 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v dd2 v ss2 v 7 v 6 v 5 v 4 v 3 v 2 v 1 v 0 v ss1 mode test clk stb pol pol22 pol21 d 27 d 26 : d 21 d 20 d 17 d 16 : d 11 d 10 d 07 d 06 : d 01 s 3 d 00 s 2 sthr s 1 co pp er foil surface remark this figure does not specify the tcp package.
datasheet s14791ej1v0ds 4 pd16721 4. pin functions (1/2) pin symbol pin name i/o description s 1 to s 384 driver o the d/a converted 256-gray-scale analog voltage is output. d 00 to d 07 port 1 display data i the display data is input with a width of 48 bits, viz., the gray scale data d 10 to d 17 (8 bits) by 6 dots (2 pixels). d 20 to d 27 d x0 : lsb, d x7 : msb d 30 to d 37 port 2 display data i d 40 to d 47 d 50 to d 57 r,/l shift direction control i the shift direction control pin of shift register. the shift directions of the shift registers are as follows. r,/l = h (right shift): sthr input, s 1 s 384 , sthl output r,/l = l (left shift) : sthl input, s 384 s 1 , sthr output sthr right shift start pulse i/o sthl left shift start pulse i/o this is the start pulse input/output pin when connected in cascade. loading of display data starts when a high level is read at the rising edge of clk. at the rising edge of the 64th clock after the start pulse input, the start pulse output reaches the high level, thus becoming the start pulse of the next-level driver. for right shift, sthr is input and sthl is output. for left shift, sthl is input and sthr is output. clk shift clock i the shift clock input pin of shift register. the display data is loaded into the data register at the rising edge. if 66 clock pulses are input after input of the start pulse, input of display data is halted automatically. the contents of the shift register are cleared at the stb?s rising edge. stb latch i the contents of the data register are transferred to the latch circuit at the rising edge. in addition, at the falling edge, the gray scale voltage is supplied to the driver. it is necessary to ensure input of one pulse per horizontal period. src slew-rate control i src = h: high-slew-rate mode (large current consumption) src = l: low-slew-rate mode (small current consumption) src is pulled up to the v dd1 in the lsi. orc output resistance control i orc = h: low output resistance mode orc = l: high output resistance mode orc is pulled up to the v dd1 in the lsi. pol polarity input i pol = l: the s 2n ? 1 output uses v 0 to v 7 as the reference supply. the s 2n output uses v 8 to v 15 as the reference supply. pol = h: the s 2n ? 1 output uses v 8 to v 15 as the reference supply. the s 2n output uses v 0 to v 7 as the reference supply. s 2n ? 1 indicates the odd output and s 2n indicates the even output. input of the pol signal is allowed the setup time (t pol?stb ) with respect to stb?s rising edge. when it switches such as pol = h l or l h, all output pins are output reset during stb = h. when it does not switch, all output pins become hi-z during stb = h. refer to 7. relationship between mode, stb, src, orc, pol, and output waveform for details.
datasheet s14791ej1v0ds 5 pd16721 (2/2) pin symbol pin name i/o description mode output reset control i mode = h or open: output reset mode = l: no output reset mode is pulled up to the v dd1 in the lsi. pol21, pol22 data inversion i select of inversion or no inversion for input data. pol21: data inversion or no inversion of port1. pol22: data inversion or no inversion of port2 pol21/22 = h: data are inverted in the lsi. pol21/22 = l: data are not inverted in the lsi. v sel driver voltage select i the driver voltage can be switched by controlling the stationary bias current of the output amplifier via v sel . v sel = h: v dd2 = 13.0 v (large bias current) v sel = l or open: v dd2 = 15.0 v (small bias current) lpc is pulled down to the v ss1 in the lsi. v 0 to v 15 -corrected power supplies ? input the -corrected power supplies from outside by using operational amplifier. during the gray scale voltage output, be sure to keep the gray scale level power supply at a constant level. make sure to maintain the following relationships. v dd2 ?0.2 v v 0 > v 1 > v 2 > ....... > v 6 > v 7 0.5 v dd2 + 0.5 v 0.5 v dd2 ?0.5 v v 8 > v 9 > v 10 > ....... v 14 > v 15 v ss2 + 0.2 v test test i normally, set the test pin to high level or leave open. this pin is pulled up to v dd1 in the lsi. v dd1 logic power supply ? 2.5 to 3.4 v v dd2 driver power supply ? 13.0 0.5 v or 15.0 0.5 v v ss1 logic ground ? grounding v ss2 driver ground ? grounding cautions 1. the power start sequence must be v dd1 , logic input, and v dd2 & v 0 to v 15 in that order. reverse this sequence to shut down. 2. to stabilize the supply voltage, please be sure to insert a 0.47 f bypass capacitor between v dd1 to v ss1 and v dd2 to v ss2 . furthermore, for increased precision of the d/a converter, insertion of a bypass capacitor of about 0.1 f is also advised between the -corrected power supply terminals (v 0 , v 1 , v 2 ,....., v 15 ) and v ss2 .
datasheet s14791ej1v0ds 6 pd16721 5. relationship between input data and output voltage value the pd16721 incorporates a 8-bit d/a converter whose odd output pins and even output pins output respectively gray scale voltages of differing polarity with respect to the lcd?s counter electrode voltage. the d/a converter consists of ladder resistors and switches. the ladder resistors (r0 to r253) are designed so that the ratio of lcd panel ( -compensated voltages to v 0 ? to v 255 ? and v 0 ? to v 255 ? is almost equivalent as shown in figure 5-2 and 5-3. for the 2 sets of eight -compensated power supplies, v 0 to v 7 and v 8 to v 15 , respectively, input gray scale voltages of the same polarity with respect to the 0.5 v dd2 . figure 5-1 shows the relationship between the driving voltages such as liquid-crystal driving voltages v dd2 , v ss2 and 0.5 v dd2 , and -corrected voltages v 0 to v 15 and the input data. be sure to maintain the voltage relationships below. v dd2 ?0.2 v v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 0.5 v dd2 +0.5 v 0.5 v dd2 ?0.5 v v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 0.5 v ss2 +0.2 v also, v 6 to v 7 and v 8 to v 9 are left open in the lsi. be sure to input the gray scale level power supply at a constant level to the all pins, as v 0 to v 15 . figures 5-2 and 5-3 show the relationship between the input data and the output voltage and the resistance values of the resistor strings. figure 5-1. relationship between input data and -corrected power supplies v dd2 v 0 v 1 v 2 v 3 v 4 v 5 v 6 v 7 0.5 v dd2 v 8 v 9 v 10 v 11 v 12 v 13 v 14 v 15 v ss2 00 01 20 40 80 c0 f0 ff input data (hex) 0.2 v 0.2 v 0.5 v 0.5 v
datasheet s14791ej1v0ds 7 pd16721 figure 5-2. relationship between input data and output voltage (1/4) v dd2 ?0.2 v v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 0.5 v dd2 + 0.5 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) 00h 00000000 v 0 ' v7 01h 00000001 v 1 ' v6 r0 86 02h 00000010 v 2 ' v6+(v5-v6) x 86 / 2206 r1 86 03h 00000011 v 3 ' v6+(v5-v6) x 172 / 2206 r2 86 04h 00000100 v 4 ' v6+(v5-v6) x 258 / 2206 r3 86 05h 00000101 v 5 ' v6+(v5-v6) x 344 / 2206 r4 86 06h 00000110 v 6 ' v6+(v5-v6) x 430 / 2206 r5 84 07h 00000111 v 7 ' v6+(v5-v6) x 514 / 2206 r6 84 08h 00001000 v 8 ' v6+(v5-v6) x 598 / 2206 r7 82 09h 00001001 v 9 ' v6+(v5-v6) x 680 / 2206 r8 82 0ah 00001010 v 10 ' v6+(v5-v6) x 762 / 2206 r9 80 0bh 00001011 v 11 ' v6+(v5-v6) x 842 / 2206 r10 78 0ch 00001100 v 12 ' v6+(v5-v6) x 920 / 2206 r11 78 0dh 00001101 v 13 ' v6+(v5-v6) x 998 / 2206 r12 76 0eh 00001110 v 14 ' v6+(v5-v6) x 1074 / 2206 r13 74 0fh 00001111 v 15 ' v6+(v5-v6) x 1148 / 2206 r14 74 10h 00010000 v 16 ' v6+(v5-v6) x 1222 / 2206 r15 72 11h 00010001 v 17 ' v6+(v5-v6) x 1294 / 2206 r16 70 12h 00010010 v 18 ' v6+(v5-v6) x 1364 / 2206 r17 68 13h 00010011 v 19 ' v6+(v5-v6) x 1432 / 2206 r18 68 14h 00010100 v 20 ' v6+(v5-v6) x 1500 / 2206 r19 66 15h 00010101 v 21 ' v6+(v5-v6) x 1566 / 2206 r20 64 16h 00010110 v 22 ' v6+(v5-v6) x 1630 / 2206 r21 64 17h 00010111 v 23 ' v6+(v5-v6) x 1694 / 2206 r22 62 18h 00011000 v 24 ' v6+(v5-v6) x 1756 / 2206 r23 60 19h 00011001 v 25 ' v6+(v5-v6) x 1816 / 2206 r24 60 1ah 00011010 v 26 ' v6+(v5-v6) x 1876 / 2206 r25 58 1bh 00011011 v 27 ' v6+(v5-v6) x 1934 / 2206 r26 56 1ch 00011100 v 28 ' v6+(v5-v6) x 1990 / 2206 r27 56 1dh 00011101 v 29 ' v6+(v5-v6) x 2046 / 2206 r28 54 1eh 00011110 v 30 ' v6+(v5-v6) x 2100 / 2206 r29 54 1fh 00011111 v 31 ' v6+(v5-v6) x 2154 / 2206 r30 52 20h 00100000 v 32 ' v5 r31 52 21h 00100001 v 33 ' v5+(v4-v5) x 52 / 1304 r32 50 22h 00100010 v 34 ' v5+(v4-v5) x 102 / 1304 r33 50 23h 00100011 v 35 ' v5+(v4-v5) x 152 / 1304 r34 48 24h 00100100 v 36 ' v5+(v4-v5) x 200 / 1304 r35 48 25h 00100101 v 37 ' v5+(v4-v5) x 248 / 1304 r36 46 26h 00100110 v 38 ' v5+(v4-v5) x 294 / 1304 r37 46 27h 00100111 v 39 ' v5+(v4-v5) x 340 / 1304 r38 46 28h 00101000 v 40 ' v5+(v4-v5) x 386 / 1304 r39 44 29h 00101001 v 41 ' v5+(v4-v5) x 430 / 1304 r40 44 2ah 00101010 v 42 ' v5+(v4-v5) x 474 / 1304 r41 44 2bh 00101011 v 43 ' v5+(v4-v5) x 518 / 1304 r42 42 2ch 00101100 v 44 ' v5+(v4-v5) x 560 / 1304 r43 42 2dh 00101101 v 45 ' v5+(v4-v5) x 602 / 1304 r44 42 2eh 00101110 v 46 ' v5+(v4-v5) x 644 / 1304 r45 40 2fh 00101111 v 47 ' v5+(v4-v5) x 684 / 1304 r46 40 30h 00110000 v 48 ' v5+(v4-v5) x 724 / 1304 r47 40 31h 00110001 v 49 ' v5+(v4-v5) x 764 / 1304 r48 40 32h 00110010 v 50 ' v5+(v4-v5) x 804 / 1304 r49 38 33h 00110011 v 51 ' v5+(v4-v5) x 842 / 1304 r50 38 34h 00110100 v 52 ' v5+(v4-v5) x 880 / 1304 r51 38 35h 00110101 v 53 ' v5+(v4-v5) x 918 / 1304 r52 38 36h 00110110 v 54 ' v5+(v4-v5) x 956 / 1304 r53 36 37h 00110111 v 55 ' v5+(v4-v5) x 992 / 1304 r54 36 38h 00111000 v 56 ' v5+(v4-v5) x 1028 / 1304 r55 36 39h 00111001 v 57 ' v5+(v4-v5) x 1064 / 1304 r56 36 3ah 00111010 v 58 ' v5+(v4-v5) x 1100 / 1304 r57 34 3bh 00111011 v 59 ' v5+(v4-v5) x 1134 / 1304 r58 34 3ch 00111100 v 60 ' v5+(v4-v5) x 1168 / 1304 r59 34 3dh 00111101 v 61 ' v5+(v4-v5) x 1202 / 1304 r60 34 3eh 00111110 v 62 ' v5+(v4-v5) x 1236 / 1304 r61 34 3fh 00111111 v 63 ' v5+(v4-v5) x 1270 / 1304 r62 34 output volta g e v 6 v 1 ? v 1 v 255 ? v 254 ? v 253 ? v 245 ? v 244 ? v 243 ? v 33 ? v 32 ? v 31 ? v 4 ? v 3 ? v 2 ? r 253 r 252 r 251 r 244 r 243 r 242 r 241 r 32 r 31 v 5 r 30 r 29 r 3 r 2 r 1 r 0 v 0 v 7 v 0 ?
datasheet s14791ej1v0ds 8 pd16721 figure 5-2. relationship between input data and output voltage (2/4) v dd2 ?0.2 v v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 0.5 v dd2 + 0.5 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) 40h 01000000 v 64 ' v4 r63 32 41h 01000001 v 65 ' v4+(v3-v4) x 32 / 1772 r64 32 42h 01000010 v 66 ' v4+(v3-v4) x 64 / 1772 r65 32 43h 01000011 v 67 ' v4+(v3-v4) x 96 / 1772 r66 32 44h 01000100 v 68 ' v4+(v3-v4) x 128 / 1772 r67 32 45h 01000101 v 69 ' v4+(v3-v4) x 160 / 1772 r68 32 46h 01000110 v 70 ' v4+(v3-v4) x 192 / 1772 r69 32 47h 01000111 v 71 ' v4+(v3-v4) x 224 / 1772 r70 30 48h 01001000 v 72 ' v4+(v3-v4) x 254 / 1772 r71 30 49h 01001001 v 73 ' v4+(v3-v4) x 284 / 1772 r72 30 4ah 01001010 v 74 ' v4+(v3-v4) x 314 / 1772 r73 30 4bh 01001011 v 75 ' v4+(v3-v4) x 344 / 1772 r74 30 4ch 01001100 v 76 ' v4+(v3-v4) x 374 / 1772 r75 30 4dh 01001101 v 77 ' v4+(v3-v4) x 404 / 1772 r76 30 4eh 01001110 v 78 ' v4+(v3-v4) x 434 / 1772 r77 30 4fh 01001111 v 79 ' v4+(v3-v4) x 464 / 1772 r78 30 50h 01010000 v 80 ' v4+(v3-v4) x 494 / 1772 r79 30 51h 01010001 v 81 ' v4+(v3-v4) x 524 / 1772 r80 28 52h 01010010 v 82 ' v4+(v3-v4) x 552 / 1772 r81 28 53h 01010011 v 83 ' v4+(v3-v4) x 580 / 1772 r82 28 54h 01010100 v 84 ' v4+(v3-v4) x 608 / 1772 r83 28 55h 01010101 v 85 ' v4+(v3-v4) x 636 / 1772 r84 28 56h 01010110 v 86 ' v4+(v3-v4) x 664 / 1772 r85 28 57h 01010111 v 87 ' v4+(v3-v4) x 692 / 1772 r86 28 58h 01011000 v 88 ' v4+(v3-v4) x 720 / 1772 r87 28 59h 01011001 v 89 ' v4+(v3-v4) x 748 / 1772 r88 28 5ah 01011010 v 90 ' v4+(v3-v4) x 776 / 1772 r89 28 5bh 01011011 v 91 ' v4+(v3-v4) x 804 / 1772 r90 28 5ch 01011100 v 92 ' v4+(v3-v4) x 832 / 1772 r91 28 5dh 01011101 v 93 ' v4+(v3-v4) x 860 / 1772 r92 28 5eh 01011110 v 94 ' v4+(v3-v4) x 888 / 1772 r93 26 5fh 01011111 v 95 ' v4+(v3-v4) x 914 / 1772 r94 26 60h 01100000 v 96 ' v4+(v3-v4) x 940 / 1772 r95 26 61h 01100001 v 97 ' v4+(v3-v4) x 966 / 1772 r96 26 62h 01100010 v 98 ' v4+(v3-v4) x 992 / 1772 r97 26 63h 01100011 v 99 ' v4+(v3-v4) x 1018 / 1772 r98 26 64h 01100100 v 100 ' v4+(v3-v4) x 1044 / 1772 r99 26 65h 01100101 v 101 ' v4+(v3-v4) x 1070 / 1772 r100 26 66h 01100110 v 102 ' v4+(v3-v4) x 1096 / 1772 r101 26 67h 01100111 v 103 ' v4+(v3-v4) x 1122 / 1772 r102 26 68h 01101000 v 104 ' v4+(v3-v4) x 1148 / 1772 r103 26 69h 01101001 v 105 ' v4+(v3-v4) x 1174 / 1772 r104 26 6ah 01101010 v 106 ' v4+(v3-v4) x 1200 / 1772 r105 26 6bh 01101011 v 107 ' v4+(v3-v4) x 1226 / 1772 r106 26 6ch 01101100 v 108 ' v4+(v3-v4) x 1252 / 1772 r107 26 6dh 01101101 v 109 ' v4+(v3-v4) x 1278 / 1772 r108 26 6eh 01101110 v 110 ' v4+(v3-v4) x 1304 / 1772 r109 26 6fh 01101111 v 111 ' v4+(v3-v4) x 1330 / 1772 r110 26 70h 01110000 v 112 ' v4+(v3-v4) x 1356 / 1772 r111 26 71h 01110001 v 113 ' v4+(v3-v4) x 1382 / 1772 r112 26 72h 01110010 v 114 ' v4+(v3-v4) x 1408 / 1772 r113 26 73h 01110011 v 115 ' v4+(v3-v4) x 1434 / 1772 r114 26 74h 01110100 v 116 ' v4+(v3-v4) x 1460 / 1772 r115 26 75h 01110101 v 117 ' v4+(v3-v4) x 1486 / 1772 r116 26 76h 01110110 v 118 ' v4+(v3-v4) x 1512 / 1772 r117 26 77h 01110111 v 119 ' v4+(v3-v4) x 1538 / 1772 r118 26 78h 01111000 v 120 ' v4+(v3-v4) x 1564 / 1772 r119 26 79h 01111001 v 121 ' v4+(v3-v4) x 1590 / 1772 r120 26 7ah 01111010 v 122 ' v4+(v3-v4) x 1616 / 1772 r121 26 7bh 01111011 v 123 ' v4+(v3-v4) x 1642 / 1772 r122 26 7ch 01111100 v 124 ' v4+(v3-v4) x 1668 / 1772 r123 26 7dh 01111101 v 125 ' v4+(v3-v4) x 1694 / 1772 r124 26 7eh 01111110 v 126 ' v4+(v3-v4) x 1720 / 1772 r125 26 7fh 01111111 v 127 ' v4+(v3-v4) x 1746 / 1772 r126 26 output volta g e v 6 v 1 ? v 1 v 255 ? v 254 ? v 253 ? v 245 ? v 244 ? v 243 ? v 33 ? v 32 ? v 31 ? v 4 ? v 3 ? v 2 ? r 253 r 252 r 251 r 244 r 243 r 242 r 241 r 32 r 31 v 5 r 30 r 29 r 3 r 2 r 1 r 0 v 0 v 7 v 0 ?
datasheet s14791ej1v0ds 9 pd16721 figure 5-2. relationship between input data and output voltage (3/4) v dd2 ?0.2 v v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 0.5 v dd2 + 0.5 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) 80h 10000000 v 128 ' v3 r127 26 81h 10000001 v 129 ' v3+(v2-v3) x 26 / 1710 r128 24 82h 10000010 v 130 ' v3+(v2-v3) x 50 / 1710 r129 26 83h 10000011 v 131 ' v3+(v2-v3) x 76 / 1710 r130 24 84h 10000100 v 132 ' v3+(v2-v3) x 100 / 1710 r131 24 85h 10000101 v 133 ' v3+(v2-v3) x 124 / 1710 r132 24 86h 10000110 v 134 ' v3+(v2-v3) x 148 / 1710 r133 24 87h 10000111 v 135 ' v3+(v2-v3) x 172 / 1710 r134 26 88h 10001000 v 136 ' v3+(v2-v3) x 198 / 1710 r135 26 89h 10001001 v 137 ' v3+(v2-v3) x 224 / 1710 r136 26 8ah 10001010 v 138 ' v3+(v2-v3) x 250 / 1710 r137 26 8bh 10001011 v 139 ' v3+(v2-v3) x 276 / 1710 r138 26 8ch 10001100 v 140 ' v3+(v2-v3) x 302 / 1710 r139 26 8dh 10001101 v 141 ' v3+(v2-v3) x 328 / 1710 r140 26 8eh 10001110 v 142 ' v3+(v2-v3) x 354 / 1710 r141 26 8fh 10001111 v 143 ' v3+(v2-v3) x 380 / 1710 r142 26 90h 10010000 v 144 ' v3+(v2-v3) x 406 / 1710 r143 26 91h 10010001 v 145 ' v3+(v2-v3) x 432 / 1710 r144 26 92h 10010010 v 146 ' v3+(v2-v3) x 458 / 1710 r145 26 93h 10010011 v 147 ' v3+(v2-v3) x 484 / 1710 r146 26 94h 10010100 v 148 ' v3+(v2-v3) x 510 / 1710 r147 26 95h 10010101 v 149 ' v3+(v2-v3) x 536 / 1710 r148 26 96h 10010110 v 150 ' v3+(v2-v3) x 562 / 1710 r149 26 97h 10010111 v 151 ' v3+(v2-v3) x 588 / 1710 r150 26 98h 10011000 v 152 ' v3+(v2-v3) x 614 / 1710 r151 26 99h 10011001 v 153 ' v3+(v2-v3) x 640 / 1710 r152 26 9ah 10011010 v 154 ' v3+(v2-v3) x 666 / 1710 r153 26 9bh 10011011 v 155 ' v3+(v2-v3) x 692 / 1710 r154 26 9ch 10011100 v 156 ' v3+(v2-v3) x 718 / 1710 r155 26 9dh 10011101 v 157 ' v3+(v2-v3) x 744 / 1710 r156 26 9eh 10011110 v 158 ' v3+(v2-v3) x 770 / 1710 r157 26 9fh 10011111 v 159 ' v3+(v2-v3) x 796 / 1710 r158 26 a0h 10100000 v 160 ' v3+(v2-v3) x 822 / 1710 r159 26 a1h 10100001 v 161 ' v3+(v2-v3) x 848 / 1710 r160 26 a2h 10100010 v 162 ' v3+(v2-v3) x 874 / 1710 r161 26 a3h 10100011 v 163 ' v3+(v2-v3) x 900 / 1710 r162 26 a4h 10100100 v 164 ' v3+(v2-v3) x 926 / 1710 r163 26 a5h 10100101 v 165 ' v3+(v2-v3) x 952 / 1710 r164 26 a6h 10100110 v 166 ' v3+(v2-v3) x 978 / 1710 r165 26 a7h 10100111 v 167 ' v3+(v2-v3) x 1004 / 1710 r166 26 a8h 10101000 v 168 ' v3+(v2-v3) x 1030 / 1710 r167 26 a9h 10101001 v 169 ' v3+(v2-v3) x 1056 / 1710 r168 26 aah 1 0 1 0 1 0 1 0 v 170 ' v3+(v2-v3) x 1082 / 1710 r169 26 abh 1 0 1 0 1 0 1 1 v 171 ' v3+(v2-v3) x 1108 / 1710 r170 28 ach 10101100 v 172 ' v3+(v2-v3) x 1136 / 1710 r171 28 adh 10101101 v 173 ' v3+(v2-v3) x 1164 / 1710 r172 28 aeh 1 0 1 0 1 1 1 0 v 174 ' v3+(v2-v3) x 1192 / 1710 r173 28 afh 10101111 v 175 ' v3+(v2-v3) x 1220 / 1710 r174 28 b0h 10110000 v 176 ' v3+(v2-v3) x 1248 / 1710 r175 28 b1h 10110001 v 177 ' v3+(v2-v3) x 1276 / 1710 r176 28 b2h 10110010 v 178 ' v3+(v2-v3) x 1304 / 1710 r177 28 b3h 10110011 v 179 ' v3+(v2-v3) x 1332 / 1710 r178 28 b4h 10110100 v 180 ' v3+(v2-v3) x 1360 / 1710 r179 28 b5h 10110101 v 181 ' v3+(v2-v3) x 1388 / 1710 r180 28 b6h 10110110 v 182 ' v3+(v2-v3) x 1416 / 1710 r181 28 b7h 10110111 v 183 ' v3+(v2-v3) x 1444 / 1710 r182 28 b8h 10111000 v 184 ' v3+(v2-v3) x 1472 / 1710 r183 28 b9h 10111001 v 185 ' v3+(v2-v3) x 1500 / 1710 r184 30 bah 1 0 1 1 1 0 1 0 v 186 ' v3+(v2-v3) x 1530 / 1710 r185 30 bbh 1 0 1 1 1 0 1 1 v 187 ' v3+(v2-v3) x 1560 / 1710 r186 30 bch 10111100 v 188 ' v3+(v2-v3) x 1590 / 1710 r187 30 bdh 10111101 v 189 ' v3+(v2-v3) x 1620 / 1710 r188 30 beh 1 0 1 1 1 1 1 0 v 190 ' v3+(v2-v3) x 1650 / 1710 r189 30 bfh 10111111 v 191 ' v3+(v2-v3) x 1680 / 1710 r190 30 output volta g e v 6 v 1 ? v 1 v 255 ? v 254 ? v 253 ? v 245 ? v 244 ? v 243 ? v 33 ? v 32 ? v 31 ? v 4 ? v 3 ? v 2 ? r 253 r 252 r 251 r 244 r 243 r 242 r 241 r 32 r 31 v 5 r 30 r 29 r 3 r 2 r 1 r 0 v 0 v 7 v 0 ?
datasheet s14791ej1v0ds 10 pd16721 figure 5-2. relationship between input data and output voltage (4/4) v dd2 ?0.2 v v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 0.5 v dd2 + 0.5 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) c0h 11000000 v 192 ' v2 r191 30 c1h 11000001 v 193 ' v2+(v1-v2) x 30 / 1966 r192 30 c2h 11000010 v 194 ' v2+(v1-v2) x 60 / 1966 r193 30 c3h 11000011 v 195 ' v2+(v1-v2) x 90 / 1966 r194 32 c4h 11000100 v 196 ' v2+(v1-v2) x 122 / 1966 r195 32 c5h 11000101 v 197 ' v2+(v1-v2) x 154 / 1966 r196 32 c6h 11000110 v 198 ' v2+(v1-v2) x 186 / 1966 r197 32 c7h 11000111 v 199 ' v2+(v1-v2) x 218 / 1966 r198 32 c8h 11001000 v 200 ' v2+(v1-v2) x 250 / 1966 r199 32 c9h 11001001 v 201 ' v2+(v1-v2) x 282 / 1966 r200 32 cah 11001010 v 202 ' v2+(v1-v2) x 314 / 1966 r201 34 cbh 11001011 v 203 ' v2+(v1-v2) x 348 / 1966 r202 34 cch 11001100 v 204 ' v2+(v1-v2) x 382 / 1966 r203 34 cdh 11001101 v 205 ' v2+(v1-v2) x 416 / 1966 r204 34 ceh 11001110 v 206 ' v2+(v1-v2) x 450 / 1966 r205 34 cfh 11001111 v 207 ' v2+(v1-v2) x 484 / 1966 r206 34 d0h 11010000 v 208 ' v2+(v1-v2) x 518 / 1966 r207 36 d1h 11010001 v 209 ' v2+(v1-v2) x 554 / 1966 r208 36 d2h 11010010 v 210 ' v2+(v1-v2) x 590 / 1966 r209 36 d3h 11010011 v 211 ' v2+(v1-v2) x 626 / 1966 r210 36 d4h 11010100 v 212 ' v2+(v1-v2) x 662 / 1966 r211 36 d5h 11010101 v 213 ' v2+(v1-v2) x 698 / 1966 r212 38 d6h 11010110 v 214 ' v2+(v1-v2) x 736 / 1966 r213 38 d7h 11010111 v 215 ' v2+(v1-v2) x 774 / 1966 r214 38 d8h 11011000 v 216 ' v2+(v1-v2) x 812 / 1966 r215 38 d9h 11011001 v 217 ' v2+(v1-v2) x 850 / 1966 r216 40 dah 11011010 v 218 ' v2+(v1-v2) x 890 / 1966 r217 40 dbh 11011011 v 219 ' v2+(v1-v2) x 930 / 1966 r218 40 dch 11011100 v 220 ' v2+(v1-v2) x 970 / 1966 r219 42 ddh 11011101 v 221 ' v2+(v1-v2) x 1012 / 1966 r220 42 deh 11011110 v 222 ' v2+(v1-v2) x 1054 / 1966 r221 42 dfh 11011111 v 223 ' v2+(v1-v2) x 1096 / 1966 r222 44 e0h 11100000 v 224 ' v2+(v1-v2) x 1140 / 1966 r223 44 e1h 11100001 v 225 ' v2+(v1-v2) x 1184 / 1966 r224 44 e2h 11100010 v 226 ' v2+(v1-v2) x 1228 / 1966 r225 46 e3h 11100011 v 227 ' v2+(v1-v2) x 1274 / 1966 r226 46 e4h 11100100 v 228 ' v2+(v1-v2) x 1320 / 1966 r227 48 e5h 11100101 v 229 ' v2+(v1-v2) x 1368 / 1966 r228 48 e6h 11100110 v 230 ' v2+(v1-v2) x 1416 / 1966 r229 50 e7h 11100111 v 231 ' v2+(v1-v2) x 1466 / 1966 r230 50 e8h 11101000 v 232 ' v2+(v1-v2) x 1516 / 1966 r231 52 e9h 11101001 v 233 ' v2+(v1-v2) x 1568 / 1966 r232 52 eah 11101010 v 234 ' v2+(v1-v2) x 1620 / 1966 r233 54 ebh 11101011 v 235 ' v2+(v1-v2) x 1674 / 1966 r234 56 ech 11101100 v 236 ' v2+(v1-v2) x 1730 / 1966 r235 56 edh 11101101 v 237 ' v2+(v1-v2) x 1786 / 1966 r236 58 eeh 11101110 v 238 ' v2+(v1-v2) x 1844 / 1966 r237 60 efh 11101111 v 239 ' v2+(v1-v2) x 1904 / 1966 r238 62 f0h 11110000 v 240 ' v1 r239 64 f1h 11110001 v 241 ' v1+(v0-v1) x 64 / 1322 r240 66 f2h 11110010 v 242 ' v1+(v0-v1) x 130 / 1322 r241 68 f3h 11110011 v 243 ' v1+(v0-v1) x 198 / 1322 r242 70 f4h 11110100 v 244 ' v1+(v0-v1) x 268 / 1322 r243 72 f5h 11110101 v 245 ' v1+(v0-v1) x 340 / 1322 r244 76 f6h 11110110 v 246 ' v1+(v0-v1) x 416 / 1322 r245 80 f7h 11110111 v 247 ' v1+(v0-v1) x 496 / 1322 r246 82 f8h 11111000 v 248 ' v1+(v0-v1) x 578 / 1322 r247 86 f9h 11111001 v 249 ' v1+(v0-v1) x 664 / 1322 r248 92 fah 11111010 v 250 ' v1+(v0-v1) x 756 / 1322 r249 98 fbh 11111011 v 251 ' v1+(v0-v1) x 854 / 1322 r250 104 fch 11111100 v 252 ' v1+(v0-v1) x 958 / 1322 r251 112 fdh 11111101 v 253 ' v1+(v0-v1) x 1070 / 1322 r252 120 feh 11111110 v 254 ' v1+(v0-v1) x 1190 / 1322 r253 132 ffh 11111111 v 255 ' v0 total 10280 output volta g e v 6 v 1 ? v 1 v 255 ? v 254 ? v 253 ? v 245 ? v 244 ? v 243 ? v 33 ? v 32 ? v 31 ? v 4 ? v 3 ? v 2 ? r 253 r 252 r 251 r 244 r 243 r 242 r 241 r 32 r 31 v 5 r 30 r 29 r 3 r 2 r 1 r 0 v 0 v 7 v 0 ?
datasheet s14791ej1v0ds 11 pd16721 figure 5-3. relationship between input data and output voltage (1/4) 0.5 v dd2 ? ? ? ? 0.5 v v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 v ss2 +0.2 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) 00h 00000000 v 0 " v8 01h 00000001 v 1 " v9 r0 86 02h 00000010 v 2 " v10+(v9-v10) x 2120 / 2206 r1 86 03h 00000011 v 3 " v10+(v9-v10) x 2034 / 2206 r2 86 04h 00000100 v 4 " v10+(v9-v10) x 1948 / 2206 r3 86 05h 00000101 v 5 " v10+(v9-v10) x 1862 / 2206 r4 86 06h 00000110 v 6 " v10+(v9-v10) x 1776 / 2206 r5 84 07h 00000111 v 7 " v10+(v9-v10) x 1692 / 2206 r6 84 08h 00001000 v 8 " v10+(v9-v10) x 1608 / 2206 r7 82 09h 00001001 v 9 " v10+(v9-v10) x 1526 / 2206 r8 82 0ah 00001010 v 10 " v10+(v9-v10) x 1444 / 2206 r9 80 0bh 00001011 v 11 " v10+(v9-v10) x 1364 / 2206 r10 78 0ch 00001100 v 12 " v10+(v9-v10) x 1286 / 2206 r11 78 0dh 00001101 v 13 " v10+(v9-v10) x 1208 / 2206 r12 76 0eh 00001110 v 14 " v10+(v9-v10) x 1132 / 2206 r13 74 0fh 00001111 v 15 " v10+(v9-v10) x 1058 / 2206 r14 74 10h 00010000 v 16 " v10+(v9-v10) x 984 / 2206 r15 72 11h 00010001 v 17 " v10+(v9-v10) x 912 / 2206 r16 70 12h 00010010 v 18 " v10+(v9-v10) x 842 / 2206 r17 68 13h 00010011 v 19 " v10+(v9-v10) x 774 / 2206 r18 68 14h 00010100 v 20 " v10+(v9-v10) x 706 / 2206 r19 66 15h 00010101 v 21 " v10+(v9-v10) x 640 / 2206 r20 64 16h 00010110 v 22 " v10+(v9-v10) x 576 / 2206 r21 64 17h 00010111 v 23 " v10+(v9-v10) x 512 / 2206 r22 62 18h 00011000 v 24 " v10+(v9-v10) x 450 / 2206 r23 60 19h 00011001 v 25 " v10+(v9-v10) x 390 / 2206 r24 60 1ah 00011010 v 26 " v10+(v9-v10) x 330 / 2206 r25 58 1bh 00011011 v 27 " v10+(v9-v10) x 272 / 2206 r26 56 1ch 00011100 v 28 " v10+(v9-v10) x 216 / 2206 r27 56 1dh 00011101 v 29 " v10+(v9-v10) x 160 / 2206 r28 54 1eh 00011110 v 30 " v10+(v9-v10) x 106 / 2206 r29 54 1fh 00011111 v 31 " v10+(v9-v10) x 52 / 2206 r30 52 20h 00100000 v 32 " v10 r31 52 21h 00100001 v 33 " v11+(v10-v11) x 1252 / 1304 r32 50 22h 00100010 v 34 " v11+(v10-v11) x 1202 / 1304 r33 50 23h 00100011 v 35 " v11+(v10-v11) x 1152 / 1304 r34 48 24h 00100100 v 36 " v11+(v10-v11) x 1104 / 1304 r35 48 25h 00100101 v 37 " v11+(v10-v11) x 1056 / 1304 r36 46 26h 00100110 v 38 " v11+(v10-v11) x 1010 / 1304 r37 46 27h 00100111 v 39 " v11+(v10-v11) x 964 / 1304 r38 46 28h 00101000 v 40 " v11+(v10-v11) x 918 / 1304 r39 44 29h 00101001 v 41 " v11+(v10-v11) x 874 / 1304 r40 44 2ah 00101010 v 42 " v11+(v10-v11) x 830 / 1304 r41 44 2bh 00101011 v 43 " v11+(v10-v11) x 786 / 1304 r42 42 2ch 00101100 v 44 " v11+(v10-v11) x 744 / 1304 r43 42 2dh 00101101 v 45 " v11+(v10-v11) x 702 / 1304 r44 42 2eh 00101110 v 46 " v11+(v10-v11) x 660 / 1304 r45 40 2fh 00101111 v 47 " v11+(v10-v11) x 620 / 1304 r46 40 30h 00110000 v 48 " v11+(v10-v11) x 580 / 1304 r47 40 31h 00110001 v 49 " v11+(v10-v11) x 540 / 1304 r48 40 32h 00110010 v 50 " v11+(v10-v11) x 500 / 1304 r49 38 33h 00110011 v 51 " v11+(v10-v11) x 462 / 1304 r50 38 34h 00110100 v 52 " v11+(v10-v11) x 424 / 1304 r51 38 35h 00110101 v 53 " v11+(v10-v11) x 386 / 1304 r52 38 36h 00110110 v 54 " v11+(v10-v11) x 348 / 1304 r53 36 37h 00110111 v 55 " v11+(v10-v11) x 312 / 1304 r54 36 38h 00111000 v 56 " v11+(v10-v11) x 276 / 1304 r55 36 39h 00111001 v 57 " v11+(v10-v11) x 240 / 1304 r56 36 3ah 00111010 v 58 " v11+(v10-v11) x 204 / 1304 r57 34 3bh 00111011 v 59 " v11+(v10-v11) x 170 / 1304 r58 34 3ch 00111100 v 60 " v11+(v10-v11) x 136 / 1304 r59 34 3dh 00111101 v 61 " v11+(v10-v11) x 102 / 1304 r60 34 3eh 00111110 v 62 " v11+(v10-v11) x 68 / 1304 r61 34 3fh 00111111 v 63 " v11+(v10-v11) x 34 / 1304 r62 34 output volta g e v 243 ?? v 244 ?? v 245 ?? v 254 ?? v 255 ?? v 2 ?? v 3 ?? v 4 ?? v 31 ?? v 32 ?? v 33 ?? r 2 r 3 r 4 r 29 r 30 r 31 r 32 v 10 r 1 r 241 r 242 r 243 r 244 r 252 r 253 v 14 v 5 ?? v 1 ?? v 9 r 0 v 15 v 0 ?? v 8
datasheet s14791ej1v0ds 12 pd16721 figure 5-3. relationship between input data and output voltage (2/4) 0.5 v dd2 ? ? ? ? 0.5 v v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 v ss2 +0.2 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) 40h 01000000 v 64 " v11 r63 32 41h 01000001 v 65 " v12+(v11-v12) x 1740 / 1772 r64 32 42h 01000010 v 66 " v12+(v11-v12) x 1708 / 1772 r65 32 43h 01000011 v 67 " v12+(v11-v12) x 1676 / 1772 r66 32 44h 01000100 v 68 " v12+(v11-v12) x 1644 / 1772 r67 32 45h 01000101 v 69 " v12+(v11-v12) x 1612 / 1772 r68 32 46h 01000110 v 70 " v12+(v11-v12) x 1580 / 1772 r69 32 47h 01000111 v 71 " v12+(v11-v12) x 1548 / 1772 r70 30 48h 01001000 v 72 " v12+(v11-v12) x 1518 / 1772 r71 30 49h 01001001 v 73 " v12+(v11-v12) x 1488 / 1772 r72 30 4ah 01001010 v 74 " v12+(v11-v12) x 1458 / 1772 r73 30 4bh 01001011 v 75 " v12+(v11-v12) x 1428 / 1772 r74 30 4ch 01001100 v 76 " v12+(v11-v12) x 1398 / 1772 r75 30 4dh 01001101 v 77 " v12+(v11-v12) x 1368 / 1772 r76 30 4eh 01001110 v 78 " v12+(v11-v12) x 1338 / 1772 r77 30 4fh 01001111 v 79 " v12+(v11-v12) x 1308 / 1772 r78 30 50h 01010000 v 80 " v12+(v11-v12) x 1278 / 1772 r79 30 51h 01010001 v 81 " v12+(v11-v12) x 1248 / 1772 r80 28 52h 01010010 v 82 " v12+(v11-v12) x 1220 / 1772 r81 28 53h 01010011 v 83 " v12+(v11-v12) x 1192 / 1772 r82 28 54h 01010100 v 84 " v12+(v11-v12) x 1164 / 1772 r83 28 55h 01010101 v 85 " v12+(v11-v12) x 1136 / 1772 r84 28 56h 01010110 v 86 " v12+(v11-v12) x 1108 / 1772 r85 28 57h 01010111 v 87 " v12+(v11-v12) x 1080 / 1772 r86 28 58h 01011000 v 88 " v12+(v11-v12) x 1052 / 1772 r87 28 59h 01011001 v 89 " v12+(v11-v12) x 1024 / 1772 r88 28 5ah 01011010 v 90 " v12+(v11-v12) x 996 / 1772 r89 28 5bh 01011011 v 91 " v12+(v11-v12) x 968 / 1772 r90 28 5ch 01011100 v 92 " v12+(v11-v12) x 940 / 1772 r91 28 5dh 01011101 v 93 " v12+(v11-v12) x 912 / 1772 r92 28 5eh 01011110 v 94 " v12+(v11-v12) x 884 / 1772 r93 26 5fh 01011111 v 95 " v12+(v11-v12) x 858 / 1772 r94 26 60h 01100000 v 96 " v12+(v11-v12) x 832 / 1772 r95 26 61h 01100001 v 97 " v12+(v11-v12) x 806 / 1772 r96 26 62h 01100010 v 98 " v12+(v11-v12) x 780 / 1772 r97 26 63h 01100011 v 99 " v12+(v11-v12) x 754 / 1772 r98 26 64h 01100100 v 100 " v12+(v11-v12) x 728 / 1772 r99 26 65h 01100101 v 101 " v12+(v11-v12) x 702 / 1772 r100 26 66h 01100110 v 102 " v12+(v11-v12) x 676 / 1772 r101 26 67h 01100111 v 103 " v12+(v11-v12) x 650 / 1772 r102 26 68h 01101000 v 104 " v12+(v11-v12) x 624 / 1772 r103 26 69h 01101001 v 105 " v12+(v11-v12) x 598 / 1772 r104 26 6ah 01101010 v 106 " v12+(v11-v12) x 572 / 1772 r105 26 6bh 01101011 v 107 " v12+(v11-v12) x 546 / 1772 r106 26 6ch 01101100 v 108 " v12+(v11-v12) x 520 / 1772 r107 26 6dh 01101101 v 109 " v12+(v11-v12) x 494 / 1772 r108 26 6eh 01101110 v 110 " v12+(v11-v12) x 468 / 1772 r109 26 6fh 01101111 v 111 " v12+(v11-v12) x 442 / 1772 r110 26 70h 01110000 v 112 " v12+(v11-v12) x 416 / 1772 r111 26 71h 01110001 v 113 " v12+(v11-v12) x 390 / 1772 r112 26 72h 01110010 v 114 " v12+(v11-v12) x 364 / 1772 r113 26 73h 01110011 v 115 " v12+(v11-v12) x 338 / 1772 r114 26 74h 01110100 v 116 " v12+(v11-v12) x 312 / 1772 r115 26 75h 01110101 v 117 " v12+(v11-v12) x 286 / 1772 r116 26 76h 01110110 v 118 " v12+(v11-v12) x 260 / 1772 r117 26 77h 01110111 v 119 " v12+(v11-v12) x 234 / 1772 r118 26 78h 01111000 v 120 " v12+(v11-v12) x 208 / 1772 r119 26 79h 01111001 v 121 " v12+(v11-v12) x 182 / 1772 r120 26 7ah 01111010 v 122 " v12+(v11-v12) x 156 / 1772 r121 26 7bh 01111011 v 123 " v12+(v11-v12) x 130 / 1772 r122 26 7ch 01111100 v 124 " v12+(v11-v12) x 104 / 1772 r123 26 7dh 01111101 v 125 " v12+(v11-v12) x 78 / 1772 r124 26 7eh 01111110 v 126 " v12+(v11-v12) x 52 / 1772 r125 26 7fh 01111111 v 127 " v12+(v11-v12) x 26 / 1772 r126 26 output volta g e v 243 ?? v 244 ?? v 245 ?? v 254 ?? v 255 ?? v 2 ?? v 3 ?? v 4 ?? v 31 ?? v 32 ?? v 33 ?? r 2 r 3 r 4 r 29 r 30 r 31 r 32 v 10 r 1 r 241 r 242 r 243 r 244 r 252 r 253 v 14 v 5 ?? v 1 ?? v 9 r 0 v 15 v 0 ?? v 8
datasheet s14791ej1v0ds 13 pd16721 figure 5-3. relationship between input data and output voltage (3/4) 0.5 v dd2 ? ? ? ? 0.5 v v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 v ss2 +0.2 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) 80h 10000000 v 128 " v12 r127 26 81h 10000001 v 129 " v13+(v12-v13) x 1684 / 1710 r128 24 82h 10000010 v 130 " v13+(v12-v13) x 1660 / 1710 r129 26 83h 10000011 v 131 " v13+(v12-v13) x 1634 / 1710 r130 24 84h 10000100 v 132 " v13+(v12-v13) x 1610 / 1710 r131 24 85h 10000101 v 133 " v13+(v12-v13) x 1586 / 1710 r132 24 86h 10000110 v 134 " v13+(v12-v13) x 1562 / 1710 r133 24 87h 10000111 v 135 " v13+(v12-v13) x 1538 / 1710 r134 26 88h 10001000 v 136 " v13+(v12-v13) x 1512 / 1710 r135 26 89h 10001001 v 137 " v13+(v12-v13) x 1486 / 1710 r136 26 8ah 10001010 v 138 " v13+(v12-v13) x 1460 / 1710 r137 26 8bh 10001011 v 139 " v13+(v12-v13) x 1434 / 1710 r138 26 8ch 10001100 v 140 " v13+(v12-v13) x 1408 / 1710 r139 26 8dh 10001101 v 141 " v13+(v12-v13) x 1382 / 1710 r140 26 8eh 10001110 v 142 " v13+(v12-v13) x 1356 / 1710 r141 26 8fh 10001111 v 143 " v13+(v12-v13) x 1330 / 1710 r142 26 90h 10010000 v 144 " v13+(v12-v13) x 1304 / 1710 r143 26 91h 10010001 v 145 " v13+(v12-v13) x 1278 / 1710 r144 26 92h 10010010 v 146 " v13+(v12-v13) x 1252 / 1710 r145 26 93h 10010011 v 147 " v13+(v12-v13) x 1226 / 1710 r146 26 94h 10010100 v 148 " v13+(v12-v13) x 1200 / 1710 r147 26 95h 10010101 v 149 " v13+(v12-v13) x 1174 / 1710 r148 26 96h 10010110 v 150 " v13+(v12-v13) x 1148 / 1710 r149 26 97h 10010111 v 151 " v13+(v12-v13) x 1122 / 1710 r150 26 98h 10011000 v 152 " v13+(v12-v13) x 1096 / 1710 r151 26 99h 10011001 v 153 " v13+(v12-v13) x 1070 / 1710 r152 26 9ah 10011010 v 154 " v13+(v12-v13) x 1044 / 1710 r153 26 9bh 10011011 v 155 " v13+(v12-v13) x 1018 / 1710 r154 26 9ch 10011100 v 156 " v13+(v12-v13) x 992 / 1710 r155 26 9dh 10011101 v 157 " v13+(v12-v13) x 966 / 1710 r156 26 9eh 10011110 v 158 " v13+(v12-v13) x 940 / 1710 r157 26 9fh 10011111 v 159 " v13+(v12-v13) x 914 / 1710 r158 26 a0h 10100000 v 160 " v13+(v12-v13) x 888 / 1710 r159 26 a1h 10100001 v 161 " v13+(v12-v13) x 862 / 1710 r160 26 a2h 10100010 v 162 " v13+(v12-v13) x 836 / 1710 r161 26 a3h 10100011 v 163 " v13+(v12-v13) x 810 / 1710 r162 26 a4h 10100100 v 164 " v13+(v12-v13) x 784 / 1710 r163 26 a5h 10100101 v 165 " v13+(v12-v13) x 758 / 1710 r164 26 a6h 10100110 v 166 " v13+(v12-v13) x 732 / 1710 r165 26 a7h 10100111 v 167 " v13+(v12-v13) x 706 / 1710 r166 26 a8h 10101000 v 168 " v13+(v12-v13) x 680 / 1710 r167 26 a9h 10101001 v 169 " v13+(v12-v13) x 654 / 1710 r168 26 aah 10101010 v 170 " v13+(v12-v13) x 628 / 1710 r169 26 abh 10101011 v 171 " v13+(v12-v13) x 602 / 1710 r170 28 ach 10101100 v 172 " v13+(v12-v13) x 574 / 1710 r171 28 adh 10101101 v 173 " v13+(v12-v13) x 546 / 1710 r172 28 aeh 10101110 v 174 " v13+(v12-v13) x 518 / 1710 r173 28 afh 10101111 v 175 " v13+(v12-v13) x 490 / 1710 r174 28 b0h 10110000 v 176 " v13+(v12-v13) x 462 / 1710 r175 28 b1h 10110001 v 177 " v13+(v12-v13) x 434 / 1710 r176 28 b2h 10110010 v 178 " v13+(v12-v13) x 406 / 1710 r177 28 b3h 10110011 v 179 " v13+(v12-v13) x 378 / 1710 r178 28 b4h 10110100 v 180 " v13+(v12-v13) x 350 / 1710 r179 28 b5h 10110101 v 181 " v13+(v12-v13) x 322 / 1710 r180 28 b6h 10110110 v 182 " v13+(v12-v13) x 294 / 1710 r181 28 b7h 10110111 v 183 " v13+(v12-v13) x 266 / 1710 r182 28 b8h 10111000 v 184 " v13+(v12-v13) x 238 / 1710 r183 28 b9h 10111001 v 185 " v13+(v12-v13) x 210 / 1710 r184 30 bah 10111010 v 186 " v13+(v12-v13) x 180 / 1710 r185 30 bbh 10111011 v 187 " v13+(v12-v13) x 150 / 1710 r186 30 bch 10111100 v 188 " v13+(v12-v13) x 120 / 1710 r187 30 bdh 10111101 v 189 " v13+(v12-v13) x 90 / 1710 r188 30 beh 10111110 v 190 " v13+(v12-v13) x 60 / 1710 r189 30 bfh 10111111 v 191 " v13+(v12-v13) x 30 / 1710 r190 30 output volta g e v 243 ?? v 244 ?? v 245 ?? v 254 ?? v 255 ?? v 2 ?? v 3 ?? v 4 ?? v 31 ?? v 32 ?? v 33 ?? r 2 r 3 r 4 r 29 r 30 r 31 r 32 v 10 r 1 r 241 r 242 r 243 r 244 r 252 r 253 v 14 v 5 ?? v 1 ?? v 9 r 0 v 15 v 0 ?? v 8
datasheet s14791ej1v0ds 14 pd16721 figure 5-3. relationship between input data and output voltage (4/4) 0.5 v dd2 ? ? ? ? 0.5 v v 8 > v 9 > v 10 > v 11 > v 12 > v 13 > v 14 > v 15 v ss2 +0.2 v, pol21/22 = l input data d x7 d x6 d x5 d x4 d x3 d x2 d x1 d x0 r n ( ? ) c0h 11000000 v 192 " v13 r191 30 c1h 11000001 v 193 " v14+(v13-v14) x 1936 / 1966 r192 30 c2h 11000010 v 194 " v14+(v13-v14) x 1906 / 1966 r193 30 c3h 11000011 v 195 " v14+(v13-v14) x 1876 / 1966 r194 32 c4h 11000100 v 196 " v14+(v13-v14) x 1844 / 1966 r195 32 c5h 11000101 v 197 " v14+(v13-v14) x 1812 / 1966 r196 32 c6h 11000110 v 198 " v14+(v13-v14) x 1780 / 1966 r197 32 c7h 11000111 v 199 " v14+(v13-v14) x 1748 / 1966 r198 32 c8h 11001000 v 200 " v14+(v13-v14) x 1716 / 1966 r199 32 c9h 11001001 v 201 " v14+(v13-v14) x 1684 / 1966 r200 32 cah 11001010 v 202 " v14+(v13-v14) x 1652 / 1966 r201 34 cbh 11001011 v 203 " v14+(v13-v14) x 1618 / 1966 r202 34 cch 11001100 v 204 " v14+(v13-v14) x 1584 / 1966 r203 34 cdh 11001101 v 205 " v14+(v13-v14) x 1550 / 1966 r204 34 ceh 11001110 v 206 " v14+(v13-v14) x 1516 / 1966 r205 34 cfh 11001111 v 207 " v14+(v13-v14) x 1482 / 1966 r206 34 d0h 11010000 v 208 " v14+(v13-v14) x 1448 / 1966 r207 36 d1h 11010001 v 209 " v14+(v13-v14) x 1412 / 1966 r208 36 d2h 11010010 v 210 " v14+(v13-v14) x 1376 / 1966 r209 36 d3h 11010011 v 211 " v14+(v13-v14) x 1340 / 1966 r210 36 d4h 11010100 v 212 " v14+(v13-v14) x 1304 / 1966 r211 36 d5h 11010101 v 213 " v14+(v13-v14) x 1268 / 1966 r212 38 d6h 11010110 v 214 " v14+(v13-v14) x 1230 / 1966 r213 38 d7h 11010111 v 215 " v14+(v13-v14) x 1192 / 1966 r214 38 d8h 11011000 v 216 " v14+(v13-v14) x 1154 / 1966 r215 38 d9h 11011001 v 217 " v14+(v13-v14) x 1116 / 1966 r216 40 dah 11011010 v 218 " v14+(v13-v14) x 1076 / 1966 r217 40 dbh 11011011 v 219 " v14+(v13-v14) x 1036 / 1966 r218 40 dch 11011100 v 220 " v14+(v13-v14) x 996 / 1966 r219 42 ddh 11011101 v 221 " v14+(v13-v14) x 954 / 1966 r220 42 deh 11011110 v 222 " v14+(v13-v14) x 912 / 1966 r221 42 dfh 11011111 v 223 " v14+(v13-v14) x 870 / 1966 r222 44 e0h 11100000 v 224 " v14+(v13-v14) x 826 / 1966 r223 44 e1h 11100001 v 225 " v14+(v13-v14) x 782 / 1966 r224 44 e2h 11100010 v 226 " v14+(v13-v14) x 738 / 1966 r225 46 e3h 11100011 v 227 " v14+(v13-v14) x 692 / 1966 r226 46 e4h 11100100 v 228 " v14+(v13-v14) x 646 / 1966 r227 48 e5h 11100101 v 229 " v14+(v13-v14) x 598 / 1966 r228 48 e6h 11100110 v 230 " v14+(v13-v14) x 550 / 1966 r229 50 e7h 11100111 v 231 " v14+(v13-v14) x 500 / 1966 r230 50 e8h 11101000 v 232 " v14+(v13-v14) x 450 / 1966 r231 52 e9h 11101001 v 233 " v14+(v13-v14) x 398 / 1966 r232 52 eah 11101010 v 234 " v14+(v13-v14) x 346 / 1966 r233 54 ebh 11101011 v 235 " v14+(v13-v14) x 292 / 1966 r234 56 ech 11101100 v 236 " v14+(v13-v14) x 236 / 1966 r235 56 edh 11101101 v 237 " v14+(v13-v14) x 180 / 1966 r236 58 eeh 11101110 v 238 " v14+(v13-v14) x 122 / 1966 r237 60 efh 11101111 v 239 " v14+(v13-v14) x 62 / 1966 r238 62 f0h 11110000 v 240 " v14 r239 64 f1h 11110001 v 241 " v15+(v14-v15) x 1258 / 1322 r240 66 f2h 11110010 v 242 " v15+(v14-v15) x 1192 / 1322 r241 68 f3h 11110011 v 243 " v15+(v14-v15) x 1124 / 1322 r242 70 f4h 11110100 v 244 " v15+(v14-v15) x 1054 / 1322 r243 72 f5h 11110101 v 245 " v15+(v14-v15) x 982 / 1322 r244 76 f6h 11110110 v 246 " v15+(v14-v15) x 906 / 1322 r245 80 f7h 11110111 v 247 " v15+(v14-v15) x 826 / 1322 r246 82 f8h 11111000 v 248 " v15+(v14-v15) x 744 / 1322 r247 86 f9h 11111001 v 249 " v15+(v14-v15) x 658 / 1322 r248 92 fah 11111010 v 250 " v15+(v14-v15) x 566 / 1322 r249 98 fbh 11111011 v 251 " v15+(v14-v15) x 468 / 1322 r250 104 fch 11111100 v 252 " v15+(v14-v15) x 364 / 1322 r251 112 fdh 11111101 v 253 " v15+(v14-v15) x 252 / 1322 r252 120 feh 11111110 v 254 " v15+(v14-v15) x 132 / 1322 r253 132 ffh 11111111 v 255 " v15 total 10280 output volta g e v 243 ?? v 244 ?? v 245 ?? v 254 ?? v 255 ?? v 2 ?? v 3 ?? v 4 ?? v 31 ?? v 32 ?? v 33 ?? r 2 r 3 r 4 r 29 r 30 r 31 r 32 v 10 r 1 r 241 r 242 r 243 r 244 r 252 r 253 v 14 v 5 ?? v 1 ?? v 9 r 0 v 15 v 0 ?? v 8
datasheet s14791ej1v0ds 15 pd16721 6. relationship between input data and output pin data format: 8 bits x 2 rgbs (6 dots) input width: 48 bits (2-pixel data) (1) r,/l = h (right shift) output s 1 s 2 s 3 s 4 s 383 s 384 data d 00 to d 07 d 10 to d 17 d 20 to d 27 d 30 to d 37 d 40 to d 47 d 50 to d 57 (2) r,/l = l (left shift) output s 1 s 2 s 3 s 4 s 383 s 384 data d 00 to d 07 d 10 to d 17 d 20 to d 27 d 30 to d 37 d 40 to d 47 d 50 to d 57 pol s 2n?1 note s 2n note lv 0 to v 7 v 8 to v 15 hv 8 to v 15 v 0 to v 7 note s 2n?1 (odd output), s 2n (even output), n = 1, 2, ..., 192.
datasheet s14791ej1v0ds 16 pd16721 7. relationship between mode, stb, src, orc, pol, and output waveform when the mode pin is high level or left open and stb is high level, all outputs are reset (shorted) and the gray- scale voltage is output to lcd in synchronization with the falling edge of stb. when the mode pin is low level and stb is high level, all outputs became hi-z and the gray-scale voltage is output to the lcd in synchronization with the falling edge of stb. also, setting the src pin to high level allows the bias current value of the output amplifier to rise temporarily, and setting the orc pin to high level allows the output resistance value of the amplifier to lower temporarily. for the timing and the processing of stb, src, or orc during a high-level period, we recommend a thorough evaluation of the lcd panel specifications in advance. (1) when mode is high level or left open stb pol s 2n ? 1 s 2n hi-z hi-z hi-z src orc low-slew-rate period high output resistance period voltage selected form v 0 to v 7 voltage selected form v 0 to v 7 voltage selected form v 8 to v 15 voltage selected form v 0 to v 7 voltage selected form v 8 to v 15 high-slew-rate period voltage selected form v 8 to v 15 low output resistance period
datasheet s14791ej1v0ds 17 pd16721 (2) when mode is low level stb pol s 2n ? 1 s 2n hi-z hi-z hi-z src orc low-slew-rate period high-slew-rate period high output resistance period low output resistance period voltage selected form v 0 to v 7 voltage selected form v 8 to v 15 voltage selected form v 0 to v 7 voltage selected form v 8 to v 15 voltage selected form v 0 to v 7 voltage selected form v 8 to v 15
datasheet s14791ej1v0ds 18 pd16721 8. electrical specifications absolute maximum ratings (t a = 25 c, v ss1 = v ss2 = 0 v) parameter symbol ratings unit logic part supply voltage v dd1 ?0.5 to +4.0 v driver part supply voltage v dd2 ?0.5 to +17.0 v logic part input voltage v i1 ?0.5 to v dd1 + 0.5 v driver part input voltage v i2 ?0.5 to v dd2 + 0.5 v logic part output voltage v o1 ?0.5 to v dd1 + 0.5 v driver part output voltage v o2 ?0.5 to v dd2 + 0.5 v operating ambient temperature t a ?10 to +75 c storage temperature t stg ?55 to +125 c caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. recommended operating range (t a = ?10 to +75 c, v ss1 = v ss2 = 0 v) parameter symbol condition min. typ. max. unit logic part supply voltage v dd1 2.5 3.4 v v sel = h 12.5 13.0 13.5 v driver part supply voltage v dd2 v sel = l or open 14.5 15.0 15.5 high-level input voltage v ih 0.7 v dd1 v dd1 v low-level input voltage v il 00.3 v dd1 v -corrected voltage v 0 to v 7 0.5 v dd2 +0.5 v dd2 ? 0.2 v v 8 to v 15 0.2 0.5 v dd2 ? 0.5 v driver part output voltage v o 0.2 v dd2 ? 0.2 v clock frequency f clk 2.5 v v dd1 3.0 v 55 mhz 3.0 v v dd1 3.4 v 70 mhz
datasheet s14791ej1v0ds 19 pd16721 electrical characteristics (t a = ?10 to +75 c, v dd1 = 2.5 to 3.4 v, v dd2 = 12.5 to 15.5 v, v ss1 = v ss2 = 0 v) parameter symbol condition min. typ. max. unit input leakage current i il 1.0 a high-level output voltage v oh sthr (sthl), i oh = 0 ma v dd1 ? 0.1 v low-level output voltage v ol sthr (sthl), i ol = 0 ma 0.1 v -corrected power supply static i v dd2 = 15.0 v v 0 , v 8 340 681 1020 ma current consumption v 0 to v 7 = v 8 to v 15 = 7.0 v v 7 , v 15 ? 1020 ? 681 ? 340 ma driver output current i voh v x = 12 v, v out = 11 v note ? 0.40 ma i vol v x = 1 v, v out = 2 v note 0.65 ma output voltage deviation ? v o t a = 25 c v ss2 + 1.0 v to v dd2 ? 1.0 v 10 20 mv ? v p-p1 v out = 7.0 to 8.0 v note 5 10 mv ? v p-p2 v out = 4.0 to 11.0 v note 7 15 mv output swing voltage difference deviation ? v p-p3 v dd1 = 3.3 v v dd2 = 15.0 v t a = 25 c v out = 1.0 to 14.0 v note 10 20 mv logic part dynamic current consumption i dd1 v dd1 1.3 10 ma driver part dynamic current consumption i dd2 v dd2 , with no load 12 30 ma note v x refers to the output voltage of analog output pins s 1 to s 384 . v out refers to the voltage applied to analog output pins s 1 to s 384 . cautions 1. f stb = 64 khz, f clk = 54 mhz 2. the typ. values refer to an all black or all white input pattern. the max. value refers to the measured values in the dot checkerboard input pattern. 3. refers to the current consumption per driver when cascades are connected under the assumption of sxga single-sided mounting (10 units).
datasheet s14791ej1v0ds 20 pd16721 switching characteristics (t a = ? ? ? ? 10 to +75 c, v dd1 = 2.5 to 3.4 v, v dd2 = 12.5 to 15.5 v, v ss1 = v ss2 = 0 v) parameter symbol condition min. typ. max. unit start pulse delay time t plh1 c l = 15 pf 12 ns driver output delay time t plh2 note c l = 100 pf, r l = 10 k ? 5 s t plh3 note 10 s t phl2 note 5 s t phl3 note 10 s input capacitance c i1 logic input, except sthr (sthl), t a = 25 c 510pf c i2 sthr (sthl), t a = 25 c1015pf note t plh2 , t phl2 refer to the arrival time from falling edge of stb to target voltage 10% t plh3 , t phl3 refer to the arrival time from falling edge of stb to target voltage 0.02 v (condition: v o = 3.0 v ? 12.0 v) test condition c l1 c l2 c l3 r l3 r l2 r l5 r ln = 2 k ? c ln = 20 pf c l4 r l4 c l5 r l1 output the measurement point
datasheet s14791ej1v0ds 21 pd16721 timing requirements (t a = ? ? ? ? 10 to +75 c, v dd1 = 2.5 to 3.4 v, v ss1 = 0 v, t r = t f = 5.0 ns) parameter symbol condition min. typ. max. unit clock pulse width pw clk 2.5 v v dd1 3.0 v 18 ns 3.0 v v dd1 3.4 v 14 clock pulse high period pw clk (h) 2.5 v v dd1 3.0 v 6 ns 3.0 v v dd1 3.4 v 4 clock pulse low period pw clk (l) 4ns data setup time t setup1 0ns data hold time t hold1 4ns start pulse setup time t setup2 0ns start pulse hold time t hold2 4ns pol21/22 setup time t setup3 0ns pol21/22 hold time t hold3 4ns stb pulse width pw stb 1.0 s last data timing t ldt 2clk clk-stb time t clk-stb clk stb 4ns stb-clk time t stb-clk stb clk 4ns time between stb and start pulse t stb-sth stb sthr (sthl) 2clk pol-stb time t pol-stb pol or stb 4ns stb-pol time t stb-pol stb pol or 4ns stb-src time t stb-src stb src 0ns stb-orc time t stb-orc stb orc 0ns remark unless otherwise specified, the input level is defined to be v ih = 0.7 v dd1 , v il = 0.3 v dd1 .
datasheet s14791ej1v0ds 22 pd16721 switching characteristic waveform (1) r,/l= h, mode = h or open unless otherwise specified, v ih , v il are defined to be v ih = 0.7 v dd1 , v il = 0.3 v dd1 (numbers clock and display data are example when in sxga). pw clk(l) clk pol s n (v x ) stb d n0 to d n7 sthr (1st dr.) sthl (1st dr.) pw clk(h) t r t setup2 invalid d 1 to d 6 t hold2 12 12 3646566 641 642 t f v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 pw clk t clk-stb t stb-clk t stb-sth t setup1 90 % 10 % t hold1 t plh1 t pol-stb t stb-pol t plh3 t plh2 t phl2 t phl3 t ldt pw stb d 7 to d 12 d 1 to d 6 d 7 to d 12 d 373 to d 378 d 385 to d 390 d 3835 to d 3840 invalid invalid v dd1 v ss1 invalid pol21/22 d 379 to d 384 t hold3 t setup3 src, orc v dd1 v ss1 t stb-src t stb-orc
datasheet s14791ej1v0ds 23 pd16721 (2) r,/l= h, mode = l unless otherwise specified, v ih , v il are defined to be v ih = 0.7 v dd1 , v il = 0.3 v dd1 (numbers clock and display data are example when in sxga). pw clk(l) clk pol stb d n0 to d n7 sthr (1st dr.) sthl (1st dr.) pw clk(h) t r t setup2 invalid d 1 to d 6 t hold2 12 12 3646566 641 642 t f v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 pw clk t clk-stb t stb-clk t stb-sth t setup1 90 % 10 % t hold1 t plh1 t pol-stb t stb-pol t plh3 t plh2 t phl2 t phl3 hi-z t ldt pw stb d 7 to d 12 d 1 to d 6 d 7 to d 12 d 373 to d 378 d 385 to d 390 d 3835 to d 3840 invalid invalid v dd1 v ss1 invalid pol21/22 d 379 to d 384 t hold3 t setup3 src, orc v dd1 v ss1 t stb-src t stb-orc s n (v x )
datasheet s14791ej1v0ds 24 pd16721 9. recommended mounting conditions the following conditions must be met for mounting conditions of the pd16721. for more details, refer to the semiconductor device mounting technology manual (c10535e). please consult with our sales offices in case other mounting process is used, or in case the mounting is done under different conditions. pd16721n- xxx: tcp (tab pack age) mounting condition mounting method condition thermocompression soldering heating tool 300 to 350 c, heating for 2 to 3 sec, pressure 100g (per solder). acf (adhesive conductive film) temporaly bonding 70 to 100 c, pressure 3 to 8 kg/cm 2 , time 3 to 5 sec. real bonding 165 to 180 c, pressure 25 to 45 kg/cm 2 , time 30 to 40 sec (when using the anisotropy conductive film sumizac1003 of sumitomo bakelite, ltd). caution to find out the detailed conditions for mounting the acf part, please contact the acf manufacturing company. be sure to avoid using two or more mounting methods at a time.
datasheet s14791ej1v0ds 25 pd16721 [memo]
datasheet s14791ej1v0ds 26 pd16721 [memo]
datasheet s14791ej1v0ds 27 pd16721 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
pd16721 reference documents nec semiconductor device reliability/quality control system (c10983e) quality grades on nec semiconductor devices (c11531e) m8e 00. 4 the information in this document is current as of february, 2002. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec's data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. nec semiconductor products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec semiconductor products is "standard" unless otherwise expressly specified in nec's data sheets or data books, etc. if customers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. (note) (1) "nec" as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) "nec semiconductor products" means any semiconductor product developed or manufactured by or for nec (as defined above). ? ? ? ? ? ?

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